Renesas Power Supply HD74UH04 User Guide

HD74UH04  
Inverter  
REJ03D0201–0400Z  
(Previous ADE-205-016B (Z))  
Rev.4.00  
Feb.02.2004  
Description  
The HD74UH04 is high-speed CMOS inverter using silicon gate CMOS prss. With CMOS low power  
dissipation, it provides high-speed equivalent to LS-TTL series. The intuit of three stages  
construction with buffer provides wide noise margin and stable outpu
Features  
Encapsulated in very small 5pins package of 2.9 × 1o mount on substrate is  
significantly improved.  
The basic gate function is lined up as Renesa
Supplied on emboss taping for high-spee
Electrical characteristics equivalent t
Supply voltage range: 2 to 6 V  
Operating temperature range: 
| IOH | = IOL = 2 mA (min)  
Ordering Information  
Part Name  
e Code  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
HD74UH04EL  
PAK-5V  
EL (3,000 pcs/reel)  
Rev.4.00, Feb.02.2004, page 1 of 1  
 
HD74UH04  
Recommended Operating Conditions  
Item  
Symbol  
VCC  
Ratings  
Unit  
V
Supply voltage  
Input voltage  
2 to 6  
VIN  
0 to VCC  
V
Output voltage  
Operating temperature  
Input rise/fall time  
VOUT  
Topr  
tr, tf  
0 to VCC  
V
–40 to +85  
°C  
ns  
0 to 1000 (VCC = 2.0 V)  
0 to 500 (VCC = 4.5 V)  
0 to 400 (VCC = 6.0 V)  
Electrical Characteristics  
VCC Ta = 25°C  
Ta =
tem  
Symbol (V)  
Conditions  
Min  
2.0 1.5  
4.5 3.15  
6.0 4.2  
Typ  
Max  
M
Input voltage  
VIH  
VIL  
2.0  
4.5  
6.0  
35  
1.8  
V
Output voltage VOH  
2.0
4.4  
5.9  
4.31  
5.63  
V
VIN = VIL  
IOH = –20 µA  
IOH = –2 mA  
IOH = –2.6  
mA  
VOL  
4
6.0  
4.5  
6.0  
6.0  
6.0  
0.0  
0.0  
0.0  
0.17  
0.18  
0.1  
0.1  
V
VIN = VIH  
IOL = 20 µA  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
±0.1  
1.0  
0.33  
0.33  
±1.0  
10.0  
IOL = 2 mA  
IOL = 2.6 mA  
Input current  
IIN  
µA  
VIN = VCC or GND  
VIN = VCC or GND  
Operating  
current  
ICC  
Rev.4.00, Feb.02.2004, page 3 of 6  
 
HD74UH04  
Switching Characteristics  
(CL = 15 pF, tr = tf = 6 ns, VCC = 5 V)  
Ta = 25°C  
Item  
Symbol  
Unit  
Test Conditions  
Min  
Typ  
Max  
Output rise/fall time  
tTLH  
tTHL  
5
10  
ns  
See Test circuit  
Propagation delay time  
tPLH  
tPHL  
7
15  
ns  
See Test circuit  
(CL = 50 pF, tr = tf = 6 ns)  
VCC  
Symbol (V)  
Ta = 25°C  
T
Item  
Test Conditions  
Min Typ Max 
Output rise/fall time  
tTLH  
tTHL  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
50  
14  
ns  
pF  
See Test circuit  
Propagation delay time tPLH  
tPHL  
25  
25  
See Test circuit  
21  
Input capacitance  
CIN  
10  
Equivalent capacitance CPD  
Note: CPD is equivalent caculated from the operating current without load (see  
test circuit). The hout load is calculated according to the expression  
below.  
ICC(opr) = C
Rev.4.00, Feb.02.2004, page 4 of 6  
 
HD74UH04  
Test Circuit  
VCC  
Output  
Input  
Pulse  
generator  
CL  
50  
Note:  
Operating current test time, output is open.  
Waveforms  
6 ns  
VCC  
0%  
50%  
10%  
Input  
GND  
VOH  
tTLH  
90%  
90%  
50%  
50%  
Output  
10%  
tPHL  
10%  
tPLH  
VOL  
Rev.4.00, Feb.02.2004, page 5 of 6  
 
HD74UH04  
Package Dimensions >  
Unit: mm  
1.9 0.2  
+ 0.1  
– 0.05  
0.95  
0.95  
0.16  
0 – 0.1  
+ 0.1  
– 0.05  
5 – 0.4  
2.9 0.2  
de  
MPAK–5V  
s (reference value)  
0.015 g  
Rev.4.00, Feb.02.2004, page 6 of 6  
 
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan  
Keep safety first in your circuit designs!  
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble  
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.  
Remember to give due consideration to safety when making your circuit designs, with appropriate measures sus (i) placement of substitutive, auxiliary  
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.  
Notes regarding these materials  
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Teuct best suited to the customer's  
application; they do not convey any license under any intellectual property rights, or any other rights, chnology Corp. or a third party.  
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any thirdhe use of any product data,  
diagrams, charts, programs, algorithms, or circuit application examples contained in these materi
3. All information contained in these materials, including product data, diagrams, charts, programon on products at the time of  
publication of these materials, and are subject to change by Renesas Technology Corp. withr other reasons. It is  
therefore recommended that customers contact Renesas Technology Corp. or an authorizributor for the latest product  
information before purchasing a product listed herein.  
The information described here may contain technical inaccuracies or typographical er
Renesas Technology Corp. assumes no responsibility for any damage, liability, or oterrors.  
Please also pay attention to information published by Renesas Technology Corp. echnology Corp. Semiconductor  
home page (http://www.renesas.com).  
4. When using any or all of the information contained in these materials, includins, and algorithms, please be sure to  
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5. Renesas Technology Corp. semiconductors are not designed or manufs used under circumstances in which human life  
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© 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.  
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